PIC18F6X2X Datasheet, PDF (17/386 Pages) Microchip Technology – 64/80-Pin High Performance, 64-Kbyte Enhanced FLASH Microcontrollers with A/D

PIC18F6X2X/8X2X
TABLE 1-2: PIC18F6X2X/8X2X PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number
Pin
PIC18F6X2X PIC18F8X2X ^Type
Buffer
Type
Description
PORTD is a bi-directional I/O port. These
pins have TTL input buffers when external
memory is enabled.
RD0/AD0/PSP0
RD0
AD0⁽³⁾
PSP0
58
72
I/O
ST
Digital I/O.
I/O
TTL
External memory address/data 0.
I/O
TTL
Parallel slave port data.
RD1/AD1/PSP1
RD1
AD1⁽³⁾
PSP1
55
69
I/O
ST
Digital I/O.
I/O
TTL
External memory address/data 1.
I/O
TTL
Parallel slave port data.
RD2/AD2/PSP2
RD2
AD2⁽³⁾
PSP2
54
68
I/O
ST
Digital I/O.
I/O
TTL
External memory address/data 2.
I/O
TTL
Parallel slave port data.
RD3/AD3/PSP3
RD3
AD3⁽³⁾
PSP3
53
67
I/O
ST
Digital I/O.
I/O
TTL
External memory address/data 3.
I/O
TTL
Parallel slave port data.
RD4/AD4/PSP4
RD4
AD4⁽³⁾
PSP4
52
66
I/O
ST
Digital I/O.
I/O
TTL
External memory address/data 4.
I/O
TTL
Parallel slave port data.
RD5/AD5/PSP5
RD5
AD5⁽³⁾
PSP5
51
65
I/O
ST
Digital I/O.
I/O
TTL
External memory address/data 5.
I/O
TTL
Parallel Slave Port data.
RD6/AD6/PSP6
RD6
AD6⁽³⁾
PSP6
50
64
I/O
ST
Digital I/O.
I/O
TTL
External memory address/data 6.
I/O
TTL
Parallel slave port data.
RD7/AD7/PSP7
RD7
AD7⁽³⁾
PSP7
49
63
I/O
ST
Digital I/O.
I/O
TTL
External memory address/data 7.
I/O
TTL
Parallel slave port data.
Legend:
Note 1:
2:
3:
4:
5:
6:
7:
8:
TTL = TTL compatible input
CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels
Analog = Analog input
I = Input
O
= Output
P = Power
OD = Open Drain (no P diode to VDD)
Alternate assignment for CCP2/P2A in PIC18F8X2X devices when CCP2MX (CONFIG3H<0>) is not set (all Program
Memory modes except Microcontroller).
Default assignment for CCP2/P2A when CCP2MX is set (all devices).
External memory interface functions are only available on PIC18F8X2X devices.
Default assignment for P1B/P1C/P3B/P3C for PIC18F8X2X devices when ECCPMX (CONFIG3H<1>) is set, and for all
PIC18F6X2X devices.
Alternate assignment for CCP2/P2A in PIC18F8X2X devices when CCP2MX is not set (Microcontroller mode).
PORTH and PORTJ (and their multiplexed functions) are only available on PIC18F8X2X devices.
Alternate assignment for P1B/P1C/P3B/P3C for PIC18F8X2X devices when ECCPMX (CONFIG3H<1>) is not set.
AVDD must be connected to a positive supply and AVSS must be connected to a ground reference for proper operation of
the part in User or ICSP modes. See parameter D001A for details.
 2003 Microchip Technology Inc.
Advance Information
DS39612A-page 15