PIC18F6X2X Datasheet, PDF(176/386 Page) Microchip Technology – 64/80-Pin High Performance, 64-Kbyte Enhanced FLASH Microcontrollers with A/D

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PIC18F6X2X Datasheet, PDF (176/386 Pages) Microchip Technology – 64/80-Pin High Performance, 64-Kbyte Enhanced FLASH Microcontrollers with A/D

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PIC18F6X2X/8X2X

TABLE 17-5: REGISTERS ASSOCIATED WITH ECCP MODULES AND TIMER1 TO TIMER4

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Value on

POR, BOR

Value on

all other

RESETS

INTCON

GIE/GIEH PEIE/GIEL TMR0IE

INT0IE

RBIE

TMR0IF INT0IF

RBIF 0000 000x 0000 000u

RCON

IPEN

â

â

RI

TO

PD

POR

BOR 0--1 11qq 0--q qquu

PIR1

PSPIF

ADIF

RCIF

TXIF

SSPIF CCP1IF TMR2IF TMR1IF 0000 0000 0000 0000

PIE1

PSPIE

ADIE

RCIE

TXIE

SSPIE CCP1IE TMR2IE TMR1IF 0000 0000 0000 0000

IPR1

PSPIP

ADIP

RCIP

TXIP

SSPIP CCP1IP TMR2IP TMR1IF 1111 1111 1111 1111

PIR2

â

CMIE

â

EEIE

BCLIF

LVDIF TMR3IF CCP2IF -0-0 0000 ---0 0000

PIE2

â

CMIF

â

EEIF

BCLIE

LVDIE TMR3IE CCP2IE -0-0 0000 ---0 0000

IPR2

â

CMIP

â

EEIP

BCLIP

LVDIP TMR3IP CCP2IP -1-1 1111 ---1 1111

PIR3

â

â

RC2IF

TX2IF

TMR4IF CCP5IF CCP4IF CCP3IF --00 0000 --00 0000

PIE3

â

â

RC2IE

TX2IE

TMR4IE CCP5IE CCP4IE CCP3IE --00 0000 --00 0000

IPR3

â

â

RC2IP

TX2IP

TMR4IP CCP5IP CCP4IP CCP3IP --11 1111 --11 1111

TRISB

PORTB Data Direction Register

1111 1111 1111 1111

TRISC

PORTC Data Direction Register

1111 1111 1111 1111

TRISE

PORTE Data Direction Register

1111 1111 1111 1111

TRISG

â

â

â

PORTG Data Direction Register

---1 1111 ---1 1111

TRISH

PORTH Data Direction Register

1111 1111 1111 1111

TMR1L

Holding Register for the Least Significant Byte of the 16-bit TMR1 Register

xxxx xxxx uuuu uuuu

TMR1H

Holding Register for the Most Significant Byte of the 16-bit TMR1 Register

xxxx xxxx uuuu uuuu

T1CON

RD16

â

T1CKPS1 T1CKPS0 T1OSCEN T1SYNC TMR1CS TMR1ON 0-00 0000 u-uu uuuu

TMR2

Timer2 Module Register

0000 0000 0000 0000

T2CON

â

T2OUTPS3 T2OUTPS2 T2OUTPS1 T2OUTPS0 TMR2ON T2CKPS1 T2CKPS0 -000 0000 -000 0000

PR2

Timer2 Period Register

1111 1111 1111 1111

TMR3L

Holding Register for the Least Significant Byte of the 16-bit TMR3 Register

xxxx xxxx uuuu uuuu

TMR3H

Holding Register for the Most Significant Byte of the 16-bit TMR3 Register

xxxx xxxx uuuu uuuu

T3CON

RD16

T3CCP2 T3CKPS1 T3CKPS0 T3CCP1 T3SYNC TMR3CS TMR3ON 0000 0000 uuuu uuuu

TMR4

Timer4 Module Register

0000 0000 0000 0000

T4CON

â

T4OUTPS3 T4OUTPS2 T4OUTPS1 T4OUTPS0 TMR4ON T4CKPS1 T4CKPS0 -000 0000 -000 0000

PR4

Timer4 Period Register

CCPRxL(1) Capture/Compare/PWM Register 1 (LSB)

CCPRxH(1) Capture/Compare/PWM Register 1 (MSB)

CCPxCON(1)

PxM1

PxM0

DCxB1

DCxB0

ECCPxAS(1) ECCPxASE ECCPxAS2 ECCPxAS1 ECCPxAS0

ECCPxDEL(1) PxRSEN

PxDC6

PxDC5

PxDC4

CCPxM3

PSSxAC1

PxDC3

1111 1111 1111 1111

xxxx xxxx uuuu uuuu

xxxx xxxx uuuu uuuu

CCPxM2 CCPxM1 CCPxM0 0000 0000 0000 0000

PSSxAC0 PSSxBD1 PSSxBD0 0000 0000 0000 0000

PxDC2 PxDC1 PxDC0 0000 0000 uuuu uuuu

Legend:

Note 1:

x = unknown, u = unchanged, - = unimplemented, read as â0â. Shaded cells are not used during ECCP operation.

Generic term for all of the identical registers of this name for all enhanced CCP modules, where âxâ identifies the individual

module (ECCP1, ECCP2 or ECCP3). Bit assignments and RESET values for all registers of the same generic name are

identical.

DS39612A-page 174

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ï£© 2003 Microchip Technology Inc.

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