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PIC18F6X2X Datasheet, PDF (319/386 Pages) Microchip Technology – 64/80-Pin High Performance, 64-Kbyte Enhanced FLASH Microcontrollers with A/D | |||
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PIC18F6X2X/8X2X
TSTFSZ
Test f, skip if 0
Syntax:
[ label ] TSTFSZ f [,a]
Operands:
0 ⤠f ⤠255
a â [0,1]
Operation:
skip if f = 0
Status Affected: None
Encoding:
0110 011a ffff ffff
Description:
If âfâ = 0, the next instruction,
fetched during the current instruc-
tion execution is discarded and a
NOP is executed, making this a two-
cycle instruction. If âaâ is 0, the
Access Bank will be selected, over-
riding the BSR value. If âaâ is 1,
then the bank will be selected as
per the BSR value (default).
Words:
1
Cycles:
1(2)
Note: 3 cycles if skip and followed
by a 2-word instruction.
Q Cycle Activity:
Q1
Q2
Decode
Read
register âfâ
If skip:
Q3
Process
Data
Q4
No
operation
Q1
Q2
Q3
Q4
No
operation
No
operation
No
operation
No
operation
If skip and followed by 2-word instruction:
Q1
No
operation
No
operation
Q2
No
operation
No
operation
Q3
No
operation
No
operation
Q4
No
operation
No
operation
Example:
HERE
NZERO
ZERO
TSTFSZ CNT, 1
:
:
Before Instruction
PC
= Address (HERE)
After Instruction
If CNT = 0x00,
PC = Address (ZERO)
If CNT â 0x00,
PC = Address (NZERO)
XORLW
Exclusive OR literal with W
Syntax:
[ label ] XORLW k
Operands:
0 ⤠k ⤠255
Operation:
(W) .XOR. k â W
Status Affected: N, Z
Encoding:
0000 1010 kkkk kkkk
Description:
The contents of W are XORed
with the 8-bit literal âkâ. The result
is placed in W.
Words:
1
Cycles:
1
Q Cycle Activity:
Q1
Decode
Q2
Read
literal âkâ
Q3
Process
Data
Q4
Write to W
Example:
XORLW 0xAF
Before Instruction
W = 0xB5
After Instruction
W = 0x1A
 2003 Microchip Technology Inc.
Advance Information
DS39612A-page 317
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