PIC18F6X2X Datasheet, PDF (302/386 Pages) Microchip Technology – 64/80-Pin High Performance, 64-Kbyte Enhanced FLASH Microcontrollers with A/D

PIC18F6X2X/8X2X
IORLW
Inclusive OR literal with W
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
[ label ] IORLW k
0 ≤ k ≤ 255
(W) .OR. k → W
N, Z
0000 1001 kkkk kkkk
The contents of W are OR’ed with
the eight-bit literal ‘k’. The result is
placed in W.
Words:
1
Cycles:
1
Q Cycle Activity:
Q1
Decode
Q2
Read
literal ‘k’
Q3
Process
Data
Q4
Write to W
Example:
IORLW
Before Instruction
W = 0x9A
After Instruction
W = 0xBF
0x35
IORWF
Inclusive OR W with f
Syntax:
[ label ] IORWF f [,d [,a]
Operands:
0 ≤ f ≤ 255
d ∈ [0,1]
a ∈ [0,1]
Operation:
(W) .OR. (f) → dest
Status Affected: N, Z
Encoding:
0001 00da ffff ffff
Description:
Inclusive OR W with register ‘f’. If
‘d’ is 0, the result is placed in W. If
‘d’ is 1, the result is placed back in
register ‘f’ (default). If ‘a’ is 0, the
Access Bank will be selected, over-
riding the BSR value. If ‘a’ = 1, then
the bank will be selected as per the
BSR value (default).
Words:
1
Cycles:
1
Q Cycle Activity:
Q1
Q2
Q3
Q4
Decode
Read
register ‘f’
Process
Data
Write to
destination
Example:
IORWF RESULT, 0, 1
Before Instruction
RESULT = 0x13
W
= 0x91
After Instruction
RESULT = 0x13
W
= 0x93
DS39612A-page 300
Advance Information
 2003 Microchip Technology Inc.