PIC18F6X2X Datasheet, PDF (355/386 Pages) Microchip Technology – 64/80-Pin High Performance, 64-Kbyte Enhanced FLASH Microcontrollers with A/D

PIC18F6X2X/8X2X
FIGURE 27-20: MASTER SSP I²C BUS START/STOP BITS TIMING WAVEFORMS
SCL
SDA
91
90
93
92
START
Condition
Note: Refer to Figure 27-4 for load conditions.
STOP
Condition
TABLE 27-21: MASTER SSP I²C BUS START/STOP BITS REQUIREMENTS
Param.
No.
Symbol
Characteristic
Min
Max Units
Conditions
90
TSU:STA START condition 100 kHz mode 2(TOSC)(BRG + 1)
—
ns Only relevant for
Setup time
400 kHz mode 2(TOSC)(BRG + 1) —
1 MHz mode⁽¹⁾ 2(TOSC)(BRG + 1)
—
Repeated START
condition
91
THD:STA START condition 100 kHz mode 2(TOSC)(BRG + 1)
—
ns After this period, the
Hold time
400 kHz mode 2(TOSC)(BRG + 1) —
1 MHz mode⁽¹⁾ 2(TOSC)(BRG + 1)
—
first clock pulse is
generated
92
TSU:STO STOP condition 100 kHz mode 2(TOSC)(BRG + 1)
—
ns
Setup time
400 kHz mode 2(TOSC)(BRG + 1) —
1 MHz mode⁽¹⁾ 2(TOSC)(BRG + 1)
—
93
THD:STO STOP condition 100 kHz mode 2(TOSC)(BRG + 1)
—
ns
Hold time
400 kHz mode 2(TOSC)(BRG + 1) —
1 MHz mode⁽¹⁾ 2(TOSC)(BRG + 1)
—
Note 1: Maximum pin capacitance = 10 pF for all I²C pins.
FIGURE 27-21:
SCL
SDA
In
SDA
Out
MASTER SSP I²C BUS DATA TIMING
103
100
101
90
91
106
107
109
109
Note: Refer to Figure 27-4 for load conditions.
102
92
110
 2003 Microchip Technology Inc.
Advance Information
DS39612A-page 353