PIC18F6X2X Datasheet, PDF (30/386 Pages) Microchip Technology – 64/80-Pin High Performance, 64-Kbyte Enhanced FLASH Microcontrollers with A/D

PIC18F6X2X/8X2X
If the main oscillator is configured in the RC, RCIO, EC
or ECIO modes, there is no oscillator start-up time-out.
Operation will resume after eight cycles of the main
oscillator have been counted. A timing diagram, indi-
cating the transition from the Timer1 oscillator to the
main oscillator for RC, RCIO, EC and ECIO modes, is
shown in Figure 2-12.
FIGURE 2-12:
T1OSI
OSC1
TIMING FOR TRANSITION BETWEEN TIMER1 AND OSC1 (RC, EC)
Q3
Q4
Q1
TT1P
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
TOSC
12 34 5 6 7 8
Internal System
Clock
SCS
(OSCCON<0>)
Program
Counter
PC
Note:
RC Oscillator mode assumed.
TSCS
PC + 2
PC + 4
2.7 Effects of SLEEP Mode on the
On-Chip Oscillator
When the device executes a SLEEP instruction, the on-
chip clocks and oscillator are turned off and the device
is held at the beginning of an instruction cycle (Q1
state). With the oscillator off, the OSC1 and OSC2
signals will stop oscillating. Since all the transistor
switching currents have been removed, SLEEP mode
achieves the lowest current consumption of the device
(only leakage currents). Enabling any on-chip feature
that will operate during SLEEP will increase the current
consumed during SLEEP. The user can wake from
SLEEP through external RESET, Watchdog Timer
Reset, or through an interrupt.
TABLE 2-3: OSC1 AND OSC2 PIN STATES IN SLEEP MODE
OSC Mode
OSC1 Pin
OSC2 Pin
RC
Floating, external resistor should pull high
At logic low
RCIO
Floating, external resistor should pull high
Configured as PORTA, bit 6
ECIO
Floating
Configured as PORTA, bit 6
EC
Floating
At logic low
LP, XT, and HS
Feedback inverter disabled, at
quiescent voltage level
Feedback inverter disabled, at
quiescent voltage level
Note: See Table 3-1 in Section 3.0, “Reset” for time-outs due to SLEEP and MCLR Reset.
DS39612A-page 28
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