PIC18F6X2X Datasheet, PDF (348/386 Pages) Microchip Technology – 64/80-Pin High Performance, 64-Kbyte Enhanced FLASH Microcontrollers with A/D

PIC18F6X2X/8X2X
FIGURE 27-13:
RE2/CS
PARALLEL SLAVE PORT TIMING (PIC18F8X2X)
RE0/RD
RE1/WR
65
RD7:RD0
64
Note: Refer to Figure 27-4 for load conditions.
62
63
TABLE 27-14: PARALLEL SLAVE PORT REQUIREMENTS (PIC18F8X2X)
Param.
No.
Symbol
Characteristic
Min Max Units
Conditions
62
TdtV2wrH Data in valid before WR ↑ or CS ↑
(setup time)
20 — ns
25 — ns Extended Temp. range
63
TwrH2dtI WR ↑ or CS ↑ to data–in PIC18F6X2X/8X2X 20 — ns
invalid (hold time)
PIC18LF6X2X/8X2X 35 — ns
64
TrdL2dtV RD ↓ and CS ↓ to data–out valid
— 80 ns
— 90 ns Extended Temp. range
65
TrdH2dtI RD ↑ or CS ↓ to data–out invalid
10 30 ns
66
TibfINH Inhibit of the IBF flag bit being cleared from
WR ↑ or CS ↑
— 3 TCY
DS39612A-page 346
Advance Information
 2003 Microchip Technology Inc.