PIC18F6X2X Datasheet, PDF (226/386 Pages) Microchip Technology – 64/80-Pin High Performance, 64-Kbyte Enhanced FLASH Microcontrollers with A/D

PIC18F6X2X/8X2X
FIGURE 19-3:
Write to TXREGx
BRG Output
(Shift Clock)
TX
(pin)
TXIF bit
(Transmit Buffer
Reg. Empty Flag)
TRMT bit
(Transmit Shift
Reg. Empty Flag)
ASYNCHRONOUS TRANSMISSION
Word 1
START bit
bit 0
1 TCY
bit 1
Word 1
Word 1
Transmit Shift Reg
bit 7/8 _{STOP bit}
FIGURE 19-4:
ASYNCHRONOUS TRANSMISSION (BACK TO BACK)
Write to TXREGx
BRG Output
(Shift Clock)
TX
(pin)
TXIF bit
(Interrupt Reg. Flag)
TRMT bit
(Transmit Shift
Reg. Empty Flag)
Word 1
Word 2
1 TCY
START bit bit 0
Word 1
Transmit Shift Reg.
1 TCY
bit 1
Word 1
Note:
This timing diagram shows two consecutive transmissions.
bit 7/8
STOP bit ^{START bit}
bit 0
Word 2
Word 2
Transmit Shift Reg.
TABLE 19-5: REGISTERS ASSOCIATED WITH ASYNCHRONOUS TRANSMISSION
Name
Bit 7
Bit 6
Bit 5 Bit 4 Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR, BOR
Value on
all other
RESETS
INTCON
GIE/GIEH PEIE/GIEL TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF 0000 000x 0000 000u
PIR1
—
ADIF
RCIF TXIF
— CCP1IF TMR2IF TMR1IF -000 -000 -000 -000
PIE1
—
ADIE
RCIE TXIE
— CCP1IE TMR2IE TMR1IE -000 -000 -000 -000
IPR1
—
ADIP
RCIP TXIP
— CCP1IP TMR2IP TMR1IP -111 -111 -111 -111
RCSTAx
SPEN
RX9
SREN CREN ADDEN FERR OERR RX9D 0000 -00x 0000 -00x
TXREGx USART Transmit Register
0000 0000 0000 0000
TXSTAx
CSRC
TX9
TXEN SYNC SENDB BRGH TRMT TX9D 0000 0010 0000 0010
BAUDCONx
—
RCIDL
— SCKP BRG16 —
WUE ABDEN -1-1 0-00 -1-1 0-00
SPBRGHx Baud Rate Generator Register, High Byte
0000 0000 0000 0000
SPBRGx Baud Rate Generator Register, Low Byte
0000 0000 0000 0000
Legend: x = unknown, - = unimplemented locations read as ‘0’. Shaded cells are not used for asynchronous transmission.
DS39612A-page 224
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