PIC18F6X2X Datasheet, PDF (13/386 Pages) Microchip Technology – 64/80-Pin High Performance, 64-Kbyte Enhanced FLASH Microcontrollers with A/D

PIC18F6X2X/8X2X
TABLE 1-2: PIC18F6X2X/8X2X PINOUT I/O DESCRIPTIONS
Pin Name
Pin Number
Pin
PIC18F6X2X PIC18F8X2X ^Type
Buffer
Type
Description
MCLR/VPP/RG5
MCLR
VPP
RG5
7
9
Master Clear (input) or programming
voltage (output).
I
ST
Master Clear (Reset) input. This pin is an
active low RESET to the device.
P
—
Programming voltage input.
I
ST
Digital input.
OSC1/CLKI
OSC1
CLKI
39
49
Oscillator crystal or external clock input.
I CMOS/ST Oscillator crystal input or external clock
source input. ST buffer when configured
in RC mode; otherwise CMOS.
I
CMOS
External clock source input. Always
associated with pin function OSC1 (see
OSC1/CLKI, OSC2/CLKO pins).
OSC2/CLKO/RA6
OSC2
CLKO
RA6
40
50
Oscillator crystal or clock output.
O
—
Oscillator crystal output.
Connects to crystal or resonator in
Crystal Oscillator mode.
O
—
In RC mode, OSC2 pin outputs CLKO
which has 1/4 the frequency of OSC1
and denotes the instruction cycle rate.
I/O
TTL
General purpose I/O pin.
Legend:
Note 1:
2:
3:
4:
5:
6:
7:
8:
TTL = TTL compatible input
CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels
Analog = Analog input
I = Input
O
= Output
P = Power
OD = Open Drain (no P diode to VDD)
Alternate assignment for CCP2/P2A in PIC18F8X2X devices when CCP2MX (CONFIG3H<0>) is not set (all Program
Memory modes except Microcontroller).
Default assignment for CCP2/P2A when CCP2MX is set (all devices).
External memory interface functions are only available on PIC18F8X2X devices.
Default assignment for P1B/P1C/P3B/P3C for PIC18F8X2X devices when ECCPMX (CONFIG3H<1>) is set, and for all
PIC18F6X2X devices.
Alternate assignment for CCP2/P2A in PIC18F8X2X devices when CCP2MX is not set (Microcontroller mode).
PORTH and PORTJ (and their multiplexed functions) are only available on PIC18F8X2X devices.
Alternate assignment for P1B/P1C/P3B/P3C for PIC18F8X2X devices when ECCPMX (CONFIG3H<1>) is not set.
AVDD must be connected to a positive supply and AVSS must be connected to a ground reference for proper operation of
the part in User or ICSP modes. See parameter D001A for details.
 2003 Microchip Technology Inc.
Advance Information
DS39612A-page 11