PIC18F6X2X Datasheet, PDF (372/386 Pages) Microchip Technology – 64/80-Pin High Performance, 64-Kbyte Enhanced FLASH Microcontrollers with A/D

PIC18F6X2X/8X2X
BOV .................................................................................. 291
BRA .................................................................................. 289
Break Character (12-bit) Transmit and Receive ............... 228
BRG. See Baud Rate Generator.
Brown-out Reset (BOR) ............................................. 32, 259
BSF .................................................................................. 289
BTFSC ............................................................................. 290
BTFSS .............................................................................. 290
BTG .................................................................................. 291
BZ ..................................................................................... 292
C
C Compilers
MPLAB C17 ............................................................. 320
MPLAB C18 ............................................................. 320
MPLAB C30 ............................................................. 320
CALL ................................................................................ 292
Capture (CCP Module) ..................................................... 153
Associated Registers ............................................... 155
CCP Pin Configuration ............................................. 153
CCPR1H:CCPR1L Registers ................................... 153
Software Interrupt ..................................................... 153
Timer1/Timer3 Mode Selection ................................ 153
Capture (ECCP Module) .................................................. 162
Capture/Compare/PWM (CCP) ........................................ 151
Capture Mode. See Capture.
CCP Mode and Timer Resources ............................ 152
CCPRxH Register .................................................... 152
CCPRxL Register ..................................................... 152
Compare Mode. See Compare.
Interconnect Configurations ..................................... 152
Module Configuration ............................................... 152
PWM Mode. See PWM.
Clocking Scheme/Instruction Cycle .................................... 46
CLRF ................................................................................ 293
CLRWDT .......................................................................... 293
Code Examples
16 x 16 Signed Multiply Routine ................................. 88
16 x 16 Unsigned Multiply Routine ............................. 88
8 x 8 Signed Multiply Routine ..................................... 87
8 x 8 Unsigned Multiply Routine ................................. 87
Changing Between Capture Prescalers ................... 153
Data EEPROM Read ................................................. 83
Data EEPROM Refresh Routine ................................ 84
Data EEPROM Write .................................................. 83
Erasing a FLASH Program Memory Row .................. 68
Fast Register Stack .................................................... 46
How to Clear RAM (Bank 1) Using
Indirect Addressing ............................................ 58
Implementing a Real-Time Clock Using a
Timer1 Interrupt Service .................................. 140
Initializing PORTA .................................................... 105
Initializing PORTB .................................................... 108
Initializing PORTC .................................................... 111
Initializing PORTD .................................................... 113
Initializing PORTE .................................................... 116
Initializing PORTF .................................................... 119
Initializing PORTG .................................................... 122
Initializing PORTH .................................................... 124
Initializing PORTJ ..................................................... 127
Loading the SSPBUF (SSPSR) Register ................. 178
Reading a FLASH Program Memory Word ................ 67
Saving STATUS, WREG and
BSR Registers in RAM ..................................... 104
Writing to FLASH Program Memory ..................... 70–71
Code Protection ........................................................259, 273
COMF .............................................................................. 294
Comparator ...................................................................... 243
Analog Input Connection Considerations ................ 247
Associated Registers ............................................... 248
Configuration ........................................................... 244
Effects of RESET ..................................................... 247
Interrupts .................................................................. 246
Operation ................................................................. 245
Operation During SLEEP ......................................... 247
Outputs .................................................................... 245
Reference ................................................................ 245
External Signal ................................................ 245
Internal Signal .................................................. 245
Response Time ........................................................ 245
Comparator Specifications ............................................... 334
Comparator Voltage Reference ....................................... 249
Accuracy and Error .................................................. 250
Associated Registers ............................................... 251
Configuring .............................................................. 249
Connection Considerations ...................................... 250
Effects of RESET ..................................................... 250
Operation During SLEEP ......................................... 250
Compare (CCP Module) .................................................. 154
Associated Registers ............................................... 155
CCP Pin Configuration ............................................. 154
CCPR1 Register ...................................................... 154
Software Interrupt .................................................... 154
Special Event Trigger .............................................. 154
Timer1/Timer3 Mode Selection ................................ 154
Compare (ECCP Module) ................................................ 162
Special Event Trigger ...............................139, 147, 162
Configuration Bits ............................................................ 259
Context Saving During Interrupts ..................................... 104
Control Registers
EECON1 and EECON2 ............................................. 64
TABLAT (Table Latch) Register ................................. 66
TBLPTR (Table Pointer) Register .............................. 66
Conversion Considerations .............................................. 366
CPFSEQ .......................................................................... 294
CPFSGT .......................................................................... 295
CPFSLT ........................................................................... 295
D
Data EEPROM Memory
Associated Registers ................................................. 85
EEADR Register ........................................................ 81
EEADRH Register ..................................................... 81
EECON1 Register ...................................................... 81
EECON2 Register ...................................................... 81
Operation During Code Protect ................................. 84
Protection Against Spurious Write ............................. 84
Reading ..................................................................... 83
Using .......................................................................... 84
Write Verify ................................................................ 84
Writing ........................................................................ 83
Data Memory ..................................................................... 49
General Purpose Registers ....................................... 49
Map for PIC18F6X2X/8X2X Devices ......................... 50
Special Function Registers ........................................ 49
DAW ................................................................................ 296
DC Characteristics ........................................................... 332
Power-down and Supply Current ............................. 328
Supply Voltage ......................................................... 327
DCFSNZ .......................................................................... 297
DS39612A-page 370
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