PIC18F6X2X Datasheet, PDF (120/386 Pages) Microchip Technology – 64/80-Pin High Performance, 64-Kbyte Enhanced FLASH Microcontrollers with A/D

PIC18F6X2X/8X2X
TABLE 10-9: PORTE FUNCTIONS
Name
Bit# Buffer Type
Function
RE0/AD8/RD/P2D bit 0
RE1/AD9/WR/P2C bit 1
RE2/AD10/CS/P2B bit 2
RE3/AD11/P3C⁽²⁾
bit 3
RE4/AD12/P3B⁽²⁾
bit 4
RE5/AD13/P1C⁽²⁾
bit 5
RE6/AD14/P1B⁽²⁾
bit 6
RE7/AD15/CCP2⁽³⁾/ bit 7
P2A⁽³⁾
ST/TTL⁽¹⁾
ST/TTL⁽¹⁾
ST/TTL⁽¹⁾
ST/TTL⁽¹⁾
ST/TTL⁽¹⁾
ST/TTL⁽¹⁾
ST/TTL⁽¹⁾
ST/TTL⁽¹⁾
Input/output port pin, address/data bit 8, Read control for parallel slave
port, or Enhanced PWM2 output P2D
For RD (PSP Control mode):
1 = Not a read operation
0 = Read operation, reads PORTD register (if chip selected)
Input/output port pin, address/data bit 9, Write control for parallel slave
port, or Enhanced PWM2 output P2C
For WR (PSP Control mode):
1 = Not a write operation
0 = Write operation, writes PORTD register (if chip selected)
Input/output port pin, address/data bit 10, Chip Select control for
parallel slave port, or Enhanced PWM2 output P2B
For CS (PSP Control mode):
1 = Device is not selected
0 = Device is selected
Input/output port pin, address/data bit 11 or Enhanced PWM3
output P3C.
Input/output port pin, address/data bit 12 or Enhanced PWM3
output P3B.
Input/output port pin, address/data bit 13 or Enhanced PWM1
output P1C.
Input/output port pin, address/data bit 14 or Enhanced PWM1
output P1B.
Input/output port pin, address/data bit 15, Capture2 input/Compare2
output/PWM output or Enhanced PWM output P2A.
Legend: ST = Schmitt Trigger input, TTL = TTL input
Note 1: Input buffers are Schmitt Triggers when in I/O or CCP/ECCP modes, and TTL buffers when in System Bus
or PSP Control modes.
2: Valid for all PIC18F6X2X devices and PIC18F8X2X devices when ECCPMX is set. Alternate assignments
for P1B/P1C/P3B/P3C are RH7, RH6, RH5 and RH4, respectively.
3: Valid for all PIC18F6X2X devices and PIC18F8X2X devices in Microcontroller mode when CCP2MX is not
set. RC1 is the default assignment for CCP2/P2A for all devices in Microcontroller mode when CCP2MX is
set; RB3 is the alternate assignment for PIC18F8X2X devices in operating modes except Microcontroller
mode when CCP2MX is not set.
TABLE 10-10: SUMMARY OF REGISTERS ASSOCIATED WITH PORTE
Name Bit 7 Bit 6 Bit 5
Bit 4
Bit 3 Bit 2 Bit 1 Bit 0
TRISE
PORTE Data Direction Control Register
PORTE
Read PORTE pin/Write PORTE Data Latch
LATE
Read PORTE Data Latch/Write PORTE Data Latch
MEMCON EBDIS — WAIT1 WAIT0
—
— WM1 WM0
PSPCON
IBF OBF IBOV PSPMODE —
—
—
—
Legend: x = unknown, u = unchanged. Shaded cells are not used by PORTE.
Value on:
POR, BOR
1111 1111
xxxx xxxx
xxxx xxxx
0-00 --00
0000 ----
Value on
all other
RESETS
1111 1111
uuuu uuuu
uuuu uuuu
0000 --00
0000 ----
DS39612A-page 118
Advance Information
 2003 Microchip Technology Inc.