PIC18F6X2X Datasheet, PDF (229/386 Pages) Microchip Technology – 64/80-Pin High Performance, 64-Kbyte Enhanced FLASH Microcontrollers with A/D

PIC18F6X2X/8X2X
19.2.4 AUTO WAKE-UP ON SYNC BREAK
CHARACTER
During SLEEP mode, all clocks to the USART are sus-
pended. Because of this, the baud rate generator is
inactive and a proper byte reception cannot be per-
formed. The auto wake-up feature allows the controller
to wake-up due to activity on the RX/DT line while the
USART is operating in Asynchronous mode.
The auto wake-up feature is enabled by setting the
WUE bit (BAUDCONx<1>). Once set, the typical
receive sequence on RX/DT is disabled, and the
USART remains in an IDLE state, monitoring for a
wake-up event independent of the CPU mode. A wake-
up event consists of a high-to-low transition on the RX/
DT line. (This coincides with the start of a Sync Break
or a Wake-up Signal character for the LIN protocol.)
Following a wake-up event, the module generates an
RCIF interrupt. The interrupt is generated synchro-
nously to the Q clocks in normal operating modes
(Figure 19-7) and asynchronously, if the device is in
SLEEP mode (Figure 19-8). The interrupt condition is
cleared by reading the RCREGx register.
The WUE bit is automatically cleared once a low-to-high
transition is observed on the RX line following the wake-
up event. At this point, the USART module is in IDLE
mode and returns to normal operation. This signals to
the user that the Sync Break event is over.
19.2.4.1 Special Considerations Using Auto
Wake-up
Since auto wake-up functions by sensing rising edge
transitions on RX/DT, information with any state changes
before the STOP bit may signal a false end-of-character
and cause data or framing errors. To work properly,
therefore, the initial character in the transmission must
be all ‘0’s. This can be 00h (8 bytes) for standard RS-232
devices, or 000h (12 bits) for LIN bus.
Oscillator start-up time must also be considered,
especially in applications using oscillators with longer
start-up intervals (i.e., XT or HS mode). The Sync
Break (or Wake-up Signal) character must be of suffi-
cient length and be followed by a sufficient interval to
allow enough time for the selected oscillator to start
and provide proper initialization of the USART.
19.2.4.2 Special Considerations Using the
WUE Bit
The timing of WUE and RCIF events may cause some
confusion when it comes to determining the validity of
received data. As noted, setting the WUE bit places the
USART in an IDLE mode. The wake-up event causes a
receive interrupt by setting the RCIF bit. The WUE bit
is cleared after this when a rising edge is seen on RX/
DT. The interrupt condition is then cleared by reading
the RCREGx register. Ordinarily, the data in RCREGx
will be dummy data and should be discarded.
The fact that the WUE bit has been cleared (or is still
set) and the RCIF flag is set should not be used as an
indicator of the integrity of the data in RCREGx. Users
should consider implementing a parallel method in
firmware to verify received data integrity.
To assure that no actual data is lost, check the RCIDL
bit to verify that a receive operation is not in process. If
a receive operation is not occurring, the WUE bit may
then be set just prior to entering the SLEEP mode.
FIGURE 19-7:
AUTO WAKE-UP BIT (WUE) TIMINGS DURING NORMAL OPERATION
OSC1
WUE bit
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
Bit set by user
Auto Cleared
RX/DT Line
RCIF
Cleared due to user read of RCREGx
Note: The USART remains in IDLE while the WUE bit is set.
FIGURE 19-8:
AUTO WAKE-UP BIT (WUE) TIMINGS DURING SLEEP
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
Q1
OSC1
WUE bit
Bit set by user
Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
Auto Cleared
RX/DT Line
Note 1
RCIF
SLEEP Command Executed
SLEEP Ends
Cleared due to user read of RCREGx
Note 1: If the wake-up event requires long oscillator warm-up time, the auto clear of the WUE bit can occur while the stposc signal is still active.
This sequence should not depend on the presence of Q clocks.
2: The USART remains in IDLE while the WUE bit is set.
 2003 Microchip Technology Inc.
Advance Information
DS39612A-page 227