PIC18F6X2X Datasheet, PDF (18/386 Pages) Microchip Technology – 64/80-Pin High Performance, 64-Kbyte Enhanced FLASH Microcontrollers with A/D

PIC18F6X2X/8X2X
TABLE 1-2: PIC18F6X2X/8X2X PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number
Pin
PIC18F6X2X PIC18F8X2X ^Type
Buffer
Type
Description
PORTE is a bi-directional I/O port.
RE0/AD8/RD/P2D
RE0
AD8⁽³⁾
RD
P2D
2
4
I/O
ST
Digital I/O.
I/O
TTL
External memory address/data 8.
I
TTL
Read control for parallel slave port.
O
—
Enhanced CCP2 output P2D.
RE1/AD9/WR/P2C
RE1
AD9⁽³⁾
WR
P2C
1
3
I/O
ST
Digital I/O.
I/O
TTL
External memory address/data 9.
I
TTL
Write control for parallel slave port.
O
ST
Enhanced CCP2 output P2C.
RE2/AD10/CS/P2B
RE2
AD10⁽³⁾
CS
P2B
64
78
I/O
ST
Digital I/O.
I/O
TTL
External memory address/data 10.
I
TTL
Chip select control for parallel slave port.
O
—
Enhanced CCP2 output P2B.
RE3/AD11/P3C
RE3
AD11⁽³⁾
P3C⁽⁴⁾
63
77
I/O
ST
Digital I/O.
I/O
TTL
External memory address/data 11.
O
—
Enhanced CCP3 output P3C.
RE4/AD12/P3B
RE4
AD12⁽³⁾
P3B⁽⁴⁾
62
76
I/O
ST
Digital I/O.
I/O
TTL
External memory address/data 12.
O
—
Enhanced CCP3 output P3B.
RE5/AD13/P1C
RE5
AD13⁽³⁾
P1C⁽⁴⁾
61
75
I/O
ST
Digital I/O.
I/O
TTL
External memory address/data 13.
O
—
Enhanced CCP1 output P1C.
RE6/AD14/P1B
RE6
AD14⁽³⁾
P1B⁽⁴⁾
60
74
I/O
ST
Digital I/O.
I/O
TTL
External memory address/data 14.
O
—
Enhanced CCP1 output P1B.
RE7/AD15/CCP2/P2A
59
RE7
AD15⁽³⁾
CCP2⁽⁵⁾
P2A⁽⁵⁾
73
I/O
ST
Digital I/O.
I/O
TTL
External memory address/data 15.
I/O
ST
Capture2 input, Compare2 output,
PWM2 output.
O
—
Enhanced CCP2 output P2A.
Legend:
Note 1:
2:
3:
4:
5:
6:
7:
8:
TTL = TTL compatible input
CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels
Analog = Analog input
I = Input
O
= Output
P = Power
OD = Open Drain (no P diode to VDD)
Alternate assignment for CCP2/P2A in PIC18F8X2X devices when CCP2MX (CONFIG3H<0>) is not set (all Program
Memory modes except Microcontroller).
Default assignment for CCP2/P2A when CCP2MX is set (all devices).
External memory interface functions are only available on PIC18F8X2X devices.
Default assignment for P1B/P1C/P3B/P3C for PIC18F8X2X devices when ECCPMX (CONFIG3H<1>) is set, and for all
PIC18F6X2X devices.
Alternate assignment for CCP2/P2A in PIC18F8X2X devices when CCP2MX is not set (Microcontroller mode).
PORTH and PORTJ (and their multiplexed functions) are only available on PIC18F8X2X devices.
Alternate assignment for P1B/P1C/P3B/P3C for PIC18F8X2X devices when ECCPMX (CONFIG3H<1>) is not set.
AVDD must be connected to a positive supply and AVSS must be connected to a ground reference for proper operation of
the part in User or ICSP modes. See parameter D001A for details.
DS39612A-page 16
Advance Information
 2003 Microchip Technology Inc.