GMS30C2116 Datasheet, PDF (82/322 Pages) Hynix Semiconductor – USERS MANUAL

3-18
CHAPTER 3
3.9 Subtract Instructions
The source operand or the source operand + C is subtracted from the destination operand,
the result is placed in the destination register and the condition flags are set or cleared
accordingly.
At SUB and SUBC, both operands and the result are interpreted as either all signed or all
unsigned integers. At SUBS, both operands and the result are signed integers and a trap to
Range Error occurs at overflow.
Format Notation
Operation
RR
SUB Rd, Rs
Rd := Rd - Rs;
Z := Rd = 0;
N := Rd(31);
V := overflow;
C := borrow;
-- signed or unsigned Subtract
-- sign
RR
SUBS Rd, Rs
Rd := Rd - Rs;
Z := Rd = 0;
N := Rd(31);
V := overflow;
if overflow then
trap ⇒ Range Error;
-- signed Subtract with trap
-- sign
RR
SUBC Rd, Rs
Rd := Rd - (Rs + C);
Z := Z and (Rd = 0);
N := Rd(31);
V := overflow;
C := borrow;
-- signed or unsigned Subtract
with borrow
-- sign
When the SR is denoted as a source operand at SUB, SUBS and SUBC, C is subtracted
instead of the SR. The notation is then:
Format Notation
Operation
RR
SUB Rd, C
Rd := Rd - C;
-- signed or unsigned Subtract C
RR
SUBS Rd, C
Rd := Rd - C;
-- signed Subtract C with trap
RR
SUBC Rd, C
Rd := Rd - C;
The flags and the trap condition are treated as defined by SUB, SUBS or SUBC.
Note: At SUBC, Z is cleared if Rd ≠ 0, otherwise left unchanged; thus, Z is evaluated
correctly for multi-precision operands.
Register
L0 : $124
L1 : $4
Instruction
SUB L0, L1
; L0 = L0 - L1 = $120