GMS30C2116 Datasheet, PDF (147/322 Pages) Hynix Semiconductor – USERS MANUAL

BUS INTERFACE
6-25
6.9.3 Bus Signal Description (continued)
States Names
Use
O/Z CS1#..CS3#
Chip Select. Chip select is signaled in the same cycle(s) as the
address signals. Active low of CS1#..CS3# indicates chip select
for the memory areas MEM1..MEM3 respectively.
Note: RAS# is used as chip select for a non-DRAM memory in
MEM0.
O/Z WE0#..WE3#
SRAM Write Enable. Active low indicates write enable for the
corresponding byte, active high indicates write disable.
With the GMS30C2132, WE0#..WE3# correspond to the write
enable signals for D31..D24, D23..D16, D15..D8 and D7..D0
respectively.
With the GMS30C2116, WE0# and WE1# correspond to the
write enable signals for D15..D8 and D7..D0 respectively.
O/Z OE#
Output Enable for SRAMs and EPROMs. OE# is active low on
a SRAM or EPROM read access.
O/Z IORD#
I/O Read Strobe, optionally I/O data strobe. The use of IORD#
is specified in the I/O address. Bit 10 = 0 specifies I/O read
strobe, bit 10 = 1 specifies I/O data strobe. When specified as
I/O read strobe, IORD# is low on I/O read access cycles, high
on all other cycles. When specified as I/O data strobe, IORD# is
low on any I/O access cycles, high on all other cycles.
Note: When IORD# is specified as I/O data strobe, WE# can be
used as R/W# signal.
O/Z IOWR#
I/O Write Strobe. When specified as I/O write strobe by I/O
address bit 10 = 0, IOWR# is active low on I/O write access
cycles.
O RQST
RQST signals the request for a memory or I/O access. RQST is
high from the beginning of the request until the requested access
is completed.
I
GRANT#
Bus Grant. GRANT# is signaled low by an (off-chip) bus arbiter
to grant access to the bus for memory and I/O cycles. When
Grant# is switched from low to high during an access, the bus is
only released to another bus master after completion of the
current access. The GRANT# signal supplied by a bus arbiter
may be asynchronous to the clock; it is synchronized on-chip to
avoid metastability. For systems with a single bus master,
GRANT# must be tied low.
Note: GRANT# is recommended to be kept low by the bus
arbiter on the bus master with the last access; thus, any
subsequent access by the same bus master saves the
synchronization time.