GMS30C2116 Datasheet, PDF (20/322 Pages) Hynix Semiconductor – USERS MANUAL

0-10
0.3. Pin Configuration (continued)
CHAPTER 0
Type
Bus Control
Interrupt
I/O Port
System
Control
Name
RQST
GRANT#
ACT
INT1..INT4
IO1..IO3
RESET#
State
Use
O RQST signals the request for a memory or I/O
access
I Bus Grant. GRANT# is signaled low by an bus
arbiter to grant access to the bus for memory and
I/O cycles
O Active as bus master. ACT is signaled high when
GRANT# is low and it is kept high during a current
bus access
I Interrupt Request A signal of INT1..INT4 interrupt
request pins causes an interrupt exception when
interrupt lock flag L is clear and the corresponding
INTxMask bit in FCR is not set.
I/O General Input-Output Port. IO1..IO3 can be
individually configured via IOxDirection bits in the
FCR as either input or output pins (port).
I Reset Processor. RESET# low resets the processor
to the initial state and halts all activity. RESET#
must be low for at least two cycles