GMS30C2116 Datasheet, PDF (7/322 Pages) Hynix Semiconductor – USERS MANUAL

TABLE OF CONTENTS
iii
3.27 Call Instruction ............................................................................................ 3-33
3.28 Trap Instructions .......................................................................................... 3-34
3.29 Frame Instruction......................................................................................... 3-35
3.30 Return Instruction ........................................................................................ 3-37
3.31 Fetch Instruction .......................................................................................... 3-38
3.32 Extended DSP Instructions .......................................................................... 3-39
3.33 Software Instructions ................................................................................... 3-41
3.33.1 Do Instruction.................................................................................. 3-42
3.33.2 Floating-Point Instructions .............................................................. 3-43
4. Exceptions
4.1 Exception Processing....................................................................................... 4-1
4.2 Exception Types .............................................................................................. 4-2
4.2.1 Reset .................................................................................................... 4-2
4.2.2 Range, Pointer, Frame and Privilege Error ......................................... 4-2
4.2.3 Extended Overflow.............................................................................. 4-2
4.2.4 Parity Error .......................................................................................... 4-3
4.2.5 Interrupt ............................................................................................... 4-3
4.2.6 Trace Exception................................................................................... 4-3
4.3 Exception Backtracking................................................................................... 4-4
5. Timer
5.1 Overview.......................................................................................................... 5-1
5.1.1 Timer Prescaler Register TPR............................................................. 5-1
5.1.2 Timer Register TR............................................................................... 5-2
5.1.3 Timer Compare Register TCR ............................................................ 5-2
6. Bus Interface
6.1 Bus Control General ........................................................................................ 6-1
6.1.1 SRAM and ROM Bus Access ............................................................. 6-1
6.1.1.1 SRAM and ROM Single-Cycle Read Access .................... 6-2
6.1.1.2 SRAM and ROM Multi-Cycle Read Access ..................... 6-2
6.1.1.3 SRAM Single-Cycle Write Access .................................... 6-3
6.1.1.4 SRAM Multi-Cycle write Access ...................................... 6-3
6.1.2 DRAM Bus Access ............................................................................. 6-4
6.1.2.1 DRAM Access ................................................................... 6-5
6.1.2.2 DRAM Refresh (CAS before RAS Refresh) ..................... 6-6
6.1.3 I/O Bus Access .................................................................................... 6-7
6.1.3.1 I/O Read Access ................................................................. 6-7
6.1.3.2 I/O Write Access ................................................................ 6-8