GMS30C2116 Datasheet, PDF (202/322 Pages) Hynix Semiconductor – USERS MANUAL

A-28
Call
Appendix A. Instruction Set Details
CALL
Format:
LRconst format
15
OP-code
1110111
eS
9 87
43
0
s
Ld-code
Rs-code
const1iimmmm12
const2
s = 0: Rs-code encoded G0..G15 for Rs
s = 1: Rs-code encoded L0..L15 for Rs, Ld-code encodes L0..L15 for Ld
S: Sign bit of const
e = 0: const = 18S // const1, range -16,384 ~ 16,383
e = 1: const = 2S // const1 // const2, range -1,073,741,824 ~ 1,073,741,823
Notation:
CALL
Ld, Rs, const
CALL Ld, 0, const (when Rs denotes SR)
Description:
The Call instruction causes a branch to a subprogram.
The branch address Rs + const, or const alone if Rs denotes the SR, is placed in the
program counter PC. The old PC containing the return address is saved in Ld; the old
supervisor-state flag S is also saved in bit zero of Ld. The old status register SR is saved in
Ldf, the saved instruction-length code ILC contains the length (2 or 3) of the Call
instruction. Then the frame pointer FP is incremented by the value of the Ld-code and the
frame length FL is set to six, thus creating a new stack frame.
The cache-mode flag M is cleared. All condition flags remain unchanged. Then instruction
execution proceeds at the branch address placed in the PC.
Operation:
If Rs denotes not SR then PC := Rs +const
else PC := const
Ld := old PC(31..1) // old S;
Ldf := old SR;
FP := Fo + Ld code; (Ld-cod 0 is treated as 16)
FL := 6; M:= 0;
Exceptions:
None.