GMS30C2116 Datasheet, PDF (125/322 Pages) Hynix Semiconductor – USERS MANUAL

BUS INTERFACE
6-3
6.1.1.3 SRAM Single-Cycle Write Access
CLK
Chip Select
Address Bus
addr. 1
addr. 2
addr. 3
addr. 4
addr. 5
WE0#..WE3#
OE#
Data Bus
data 1
data 2
data 3
data 4
data 5
Figure 6.3: SRAM Single-Cycle Write Access
6.1.1.4 SRAM Multi-Cycle Write Access
CLK
Chip Select
Address Bus
WE0#..WE3#
OE#
Data Bus
Address
Access time
setup time
2..16 cycles
0..1 cycles
Figure 6.4: SRAM Multi-Cycle Write Access
Bus hold
time
0..7 cycles