GMS30C2116 Datasheet, PDF (144/322 Pages) Hynix Semiconductor – USERS MANUAL

6-22
CHAPTER 6
6.9.2 Bus Signals for the GMS30C2116 Processor
The following table is an overview to the bus signals of the GMS30C2116 microprocessor.
For detailed description of the function of the bus signals refer to section 6.9.3. Bus Signal
Description.
The signal states are defined as I = input, O = output and Z = three-state (inactive).
States
I
O
O
O/Z
O/I
O/I
O/Z
O/Z
O/Z
O/Z
O/Z
O/Z
O/Z
O/Z
O
I
O
I
O/I
I
Total:
Pin count Signal-Names
1
XTAL1/CLKIN
1
XTAL2
1
CLKOUT
22
A21..A0
16
D15..D0
2
DP0..DP1
1
RAS#
2
CAS0#..CAS1#
1
WE#
3
CS1#..CS3#
2
WE0#..WE1#
1
OE#
1
IORD#
1
IOWR#
1
RQST
1
GRANT#
1
ACT
4
INT1..INT4
3
IO1..IO3
1
RESET#
16
VDD
18
GND
100
Description
External Crystal, optionally Clock Input
External Crystal
Clock Output
Address Bus
Data Bus
Parity bits
DRAM RAS signal / Chip Select for MEM0
DRAM CAS signal for bytes 0..1 / 2..3
Write Enable for DRAM and R/W# for I/O
Chip Select for MEM1..MEM3
Write Enable for SRAM bytes 0..1 / 2..3
Output Enable for SRAMs and EPROMs
I/O Read Strobe, optionally I/O Data Strobe
I/O Write Strobe
Bus Request Output
Bus Grant Input
Active as Bus Master
Interrupt Inputs
Programmable Input / Output
Reset Input
Power Supply Voltage
Ground
Table 6.8: Bus Signals for the GMS30C2116 Processor