GMS30C2116 Datasheet, PDF (302/322 Pages) Hynix Semiconductor – USERS MANUAL

A-128
Appendix A. Instruction Set Details
Store Double Word (post-increment address mode)
STD.P
Format:
LR format
15
OP-code
1101 111
87
43
0
s
Ld-code
Rs-code
s = 0: Rs-code encodes G0..G15 for Rs
s = 1: Rs-code encodes L0..L15 for Rs
Ld-code encodes L0..L15 for Ld
Notation:
STD.P Ld, Rs
Description:
The Store instruction of post-increment address mode transfers data from a register pair
Rs//Rsf into the addressed memory location, Ld is used as an address.
The content of the destination register Ld is used as an address into memory address space,
then Ld is incremented according to the specified data size of double-word memory
instruction by 8, regardless of any exception occurring. Ld is incremented by 8 at the first
memory cycle.
Operation:
Ld^ := Rs; Ld := Ld +size;
(old Ld + 4)^ := Rsf;
Exceptions:
None.