GMS30C2116 Datasheet, PDF (118/322 Pages) Hynix Semiconductor – USERS MANUAL

4-2
CHAPTER 4
4.2 Exception Types
The following exception are types ordered by priorities, Reset has the highest priority. In
case of coincidental exceptions, higher-priority exceptions overrule lower-priority
exceptions.
4.2.1 Reset
A Reset exception occurs on a transition of the RESET# signal from low to high or as a
result of a watchdog overrun. It overrules all other exceptions and is used to start execution
at the Reset entry.
The load and store pipelines are cleared and all bits of the BCR, FCR and MCR are set to
one; all other registers and flags, except those set or cleared explicitly by the exception
processing itself, remain undefined and must be initialized by software.
Note: The frame pointer FP can only be set to a defined value by restoring it from the FP in
the return SR through a Return instruction.
4.2.2 Range, Pointer, Frame and Privilege Error
These exceptions share a common entry since they cannot occur coincidentally at the same
instruction. The error-causing instruction can be identified by backtracking.
A Range Error exception occurs when an operand or result exceeds its value range.
A Pointer Error is caused by an attempted memory access using an address register (Rd or
Ld) with the content zero. The memory is not accessed, but the content of the address
register is updated in case of a post-increment or next address mode.
A Frame Error occurs when the restructuring of the stack frame reaches or exceeds the
upper bound UB of the memory part of the stack. No further Frame instruction must be
executed by the error routine for Pointer, Frame and Privilege Error before the UB is set to
a higher value and thus, an expanded stack frame fits into the higher stack bound.
A Privilege Error occurs when a privileged operation is executed in user or on return to
user state (see section 1.5. Privilege States for details).
4.2.3 Extended Overflow
An Extended Overflow condition is raised on an overflow caused by an add or subtract
operation as part of the execution of one of the Extended instructions EMAC through
EHCFFTD when the Extended Overflow exception is enabled. The Extended Overflow
exception is enabled by clearing bit 16 of the function control register FCR to zero.
When the Extended Overflow exception is blocked by a higher-priority exception or by the
L flag being set, the Extended Overflow condition is saved internally; the exception trap
occurs then when the blocking is released.
The Extended Overflow condition is cleared by the exception trap or by setting FCR(16) to
one (disabled).