GMS30C2116 Datasheet, PDF (68/322 Pages) Hynix Semiconductor – USERS MANUAL

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CHAPTER 3
Note: The I/O displacement address mode provides dynamic addressing of peripheral
devices.
When on a load instruction only a byte or half word is placed on the (lower part) of the
data bus, the higher-order bits are undefined and must be masked out before the loaded
operand is used further.
I/O Absolute Address Mode:
Notation:
LDxx.IOA, STxx.IOA -- xx: word or double-word data type
The displacement dis is used as an address into I/O address space.
LDxx.IOA 0, Rs, dis
IO
dis DATA
Rs
DATA
STxx.IOA 0, Rs, dis
IO
dis DATA
Rs
DATA
Rd must denote the SR to differentiate this mode from the I/O displacement address mode;
the content of the SR is not used.
Address bits one and zero are supplied as zero.
Execution of a memory instruction with I/O address mode does not disrupt any page mode
sequence.
Note: The I/O absolute address mode provides code efficient absolute addressing of
peripheral devices and allows simple decoding of I/O addresses.
When on a load instruction only a byte or a half word is placed on the (lower part) of the
data bus, the higher-order bits are undefined and must be masked out before the loaded
operand is used further.
Next Address Mode:
Notation:
LDxx.N,
STxx.N -- xx: any data type
The content of the destination register Rd is used as an address into memory address space,
then Rd is incremented by the signed displacement dis regardless of any exception
occurring. At a double-word data type, Rd is incremented at the first memory cycle.