GMS30C2116 Datasheet, PDF (142/322 Pages) Hynix Semiconductor – USERS MANUAL

6-20
CHAPTER 6
6.8.3 IO3Timing Mode
FCR(13) = 0, FCR(12) = 1 specifies the IO3Timing mode.
On IO3Direction = Input:
When input signal IO3Level = IO3Polarity, the EventFlag ISR(8) is set and the current
contents of the TR(15..0) is copied to the WCR. Thus, the time of the event indicated by
the 16 low-order bits of the TR is captured in the WCR. When WCR(15..0) = TR(15..0)
before the EventFlag is set, the EqualFlag ISR(7) is set. Either flag set causes an interrupt
when the IO3 interrupt is enabled.
Note: The EventFlag and the EqualFlag can be used to distinguish between an input signal
transition and a timeout. The EventFlag can be set even after the EqualFlag (but not vice
versa) during the interrupt latency time; thus, when the EventFlag is set, WCR(15..0)
contains always the time when the input reached the level specified by IO3Polarity. Note
that the EventFlag is immediately set on entering IO3Timing mode when the input signal is
already on the specified level. WCR(15..0) must be set on a value different from the value
of the TR(15..0), otherwise the EqualFlag is set immediately. The maximum span for the
timeout is 2¹⁶-1 ticks of the TR.
IO3Direction = Output:
When WCR(15..0) = TR(15..0), the EqualFlag is set and an interrupt occurs when the IO3
interrupt is enabled. Additionally, an internal toggle latch is toggled. The IO3 output signal
is high when the value of the toggle latch and IO3Polarity are not equal, otherwise low.
Thus, each toggling causes a transition of the IO3 output signal. The toggle latch is cleared
by setting FCR(13) to 1.
Note: This mode can be used to create an arbitrary output signal sequence by just updating
the WCR. When the program switches to IO3Standard mode after the end of a signal
sequence and the toggle latch remained set to 1, FCR(13) must be set to 1 and IO3Polarity
be inverted coincidentally in the same move to FCR to avoid a transition of the IO3 output
signal. The IO3 interrupt must also be disabled in the same move to FCR to avoid an
interrupt from the output signal.
6.8.4 IO3TimerInterrupt Mode
FCR(13) = 0, FCR(12) = 0 specifies the IO3TimerInterrupt mode.
Additionally to the standard use of IO3, the condition WCR(15..0) = TR(15..0) sets the
EqualFlag ISR(7) and causes an IO3 interrupt regardless of the IO3Mask in FCR(8) (IO3
interrupt disable).
Note: When the IO3 interrupt is disabled, the IO3TimerInterrupt mode can be used
independently of the use of IO3 as input or output. When the IO3 interrupt is enabled, the
IO3TimerInterrupt mode can be used as a timeout for the IO3 interrupt. The EqualFlag can
then be used to distinguish between timeout and an IO3 interrupt.