GMS30C2116 Datasheet, PDF (12/322 Pages) Hynix Semiconductor – USERS MANUAL

0-2
CHAPTER 0
0.1. GMS30C2116/32 RISC/DSP (continued)
Most of the transistors are used for the on-chip memory, the instruction cache, the register
stack and the multiplier, whereas only a small-number is required for the control logic.
Due to the Hynix’s low system cost, the GMS30C2116 and GMS3OC2132 RISC/DSP are
very well suited for embedded-systems applications requiring high performance and lowest
cost. To simplify board design as well as to reduce system costs, the GMS30C2116 and
GMS30C2132 already come with integrated periphery, such as a timer and memory and bus
control logic. Therefore, complete systems with the Hynix’s microprocessor can be
implemented with a minimum of external components. To connect any kind of memory or
I/O, no glue logic is necessary. It is even suitable for systems where up to now
microprocessors with 16-bit architecture have been used for cost reasons. Its improved
performance compared to conventional micro-controllers can be used to software-
substitute many external peripherals like graphics controllers or DSPs.
The software development tools include an optimizing C compiler, assembler, source-level
debugger with profiler as well as a real-time kernel with an extremely fast response time.
Using this real-time kernel, up to 31 tasks, each with its own virtual timer, can be
developed independently of each other. The synchronization of these tasks is effected
almost automatically by the real-time kernel. To the developer, it seems as if he has up to
31 Hynix’s microprocessors to which he can allocate his programs accordingly. Real-time
debugging of multiple tasks is assisted in an optimized way.
The following description gives a brief architectural overview:
Registers:
¡ Ü 32 global and 64 local registers of 32 bits each
¡ Ü 16 global and up to 16 local registers are addressable directly
Flags:
¡ Ü Zero(Z), negative(N), carry(C) and overflow(V) flag
¡ Ü Interrupt-mode, interrupt-lock, trace-mode, trace-pending, supervisor state, cache-mode
and high global flag
Register Data Types:
¡ Ü Unsigned integer, signed integer, signed short, signed complex short, 16-bit fixed-point,
bit-string, IEEE-754 floating-point, each either 32 or 64 bits
External Memory:
¡ Ü Address space of 4Gbytes, divided into five areas
¡ Ü Separate I/O address space
¡ Ü Load/Store architecture
¡ Ü Pipelined memory and I/O accesses
¡ Ü High-order data located and addressed at lower address (big endian)
¡ Ü Instructions and double-word data may cross DRAM page boundaries