GMS30C2116 Datasheet, PDF (263/322 Pages) Hynix Semiconductor – USERS MANUAL

Appendix A. Instruction Set Details
Load Double Word (register address mode)
A-89
LDD.R
Format:
LR format
15
OP-code
1101 001
87
43
0
s
Ld-code
Rs-code
s = 0: Rs-code encodes G0..G15 for Rs
s = 1: Rs-code encodes L0..L15 for Rs
Ld-code encodes L0..L15 for Ld
Notation:
LDD.R Ld, Rs
Description:
The Load instruction of register address mode transfers data from the addressed memory
location, Ld is used as an address, into a register pair Rs//Rsf.
The content of the destination register Ld is used as an address into memory address space.
Operation:
Rs := Ld^
Rsf := (Ld + 4)^;
Exceptions:
None.