GMS30C2116 Datasheet, PDF (117/322 Pages) Hynix Semiconductor – USERS MANUAL

EXCEPTIONS
4-1
4. Exceptions
4.1 Exception Processing
Exceptions and interrupts are events other than branches or jumps that change the normal
flow of instruction execution. An exception is an unexpected event from within the
processor, arithmetic overflow is an example of an exception. An interrupt is an event that
also cause an unexpected change in control flow but comes from outside of the processor.
Interrupts are used by I/O devices to communicate with the processor.
Exceptions are events that redirect the flow of control to a supervisor subprogram
associated with the type of exception, that is, a trap occurs as a response to the exception.
(See a detailed description of exceptions further below.) If exceptions coincide, the
exception with the highest priority takes precedence over all exceptions with lower priority.
Processing of an exception proceeds as follows:
The entry address (see section 2.4. Entry Tables) of the associated subprogram is placed in
the program counter PC and the supervisor-state flag S is set to one. The old PC is saved in
the register addressed by FP + FL; the old S flag is also saved in bit zero of this register.
The old status register SR is saved in the register addressed by FP + FL + 1 (FL = 0 is
interpreted as FL = 16); the saved instruction-length code ILC contains (in general, see
section 4.3. Exception Backtracking) the instruction-length code of the preceding
instruction.
Then the frame pointer FP is incremented by the old frame length FL and FL is set to two,
thus creating a new stack frame. The cache-mode flag M and the trace-mode flag T are
cleared, the interrupt-lock flag L is set to one. All condition flags remain unchanged.
Operation
PC := entry address of exception subprogram;
S := 1;
(FP + FL)^ := old PC(31..1)//old S;
(FP + FL + 1)^ := old SR;
FP := FP + FL;
-- FL = 0 is treated as FL = 16
FL := 2;
M := 0;
T := 0;
L := 1;
Note: At the new stack frame, the saved PC can be addressed as L0 and the saved SR as L1.
Since FL = 2, no other local registers are free for use.
A Frame instruction must be executed before the interrupt-lock flag L is cleared, before
any Call, Trap, Software instruction or any instruction with the potential to cause an
exception is executed. Otherwise, the beginning of the register part of the stack at the SP
could be overwritten without any warning.
An entry caused by an exception can be differentiated from an entry caused by a Trap
instruction by the value of FL: FL is set to two by an exception and set to six by a Trap
instruction.