GMS30C2116 Datasheet, PDF (104/322 Pages) Hynix Semiconductor – USERS MANUAL

3-40
CHAPTER 3
3.30 Return Instruction
The Return instruction returns control from a subprogram entered through a Call, Trap or
Software instruction or an exception to the instruction located at the return address and
restores the status from the saved return status.
The source operand pair Rs//Rsf is placed in the register pair PC//SR. The program counter
PC is restored first from Rs. Then all bits of the status register SR are replaced by Rsf,
except the supervisor flag S, which is restored from bit zero of Rs and except the
instruction length code ILC, which is cleared to zero.
If the return occurred from user to supervisor state or if the interrupt-lock flag L was
changed from zero to one on return from any state to user state, a trap to Privilege Error
occurs. Exception processing saves the restored contents of the register pair PC//SR; an
illegally set S or L flag is also saved.
Then the difference between frame pointer FP - stack pointer SP(8..2) is evaluated and
interpreted as a signed 7-bit integer. If the difference is not negative, the register pointed to
by FP(5..0) is in the register part of the stack; no further action is then required and the
Return instruction is completed.
If the difference is negative, the number of words equal to the negative difference are
pulled from the memory part of the stack and transferred to the register part of the stack,
beginning with the contents of the memory location SP - 4 being transferred to the local
register addressed absolutely by bits 7..2 of SP - 4. After each memory cycle, the SP is
decreased by four until the difference is eliminated.
The Return instruction shares its basic OP-code with the Move Double-Word instruction. It
is differentiated from it by denoting the PC as destination register Rd.
The PC or the SR must not be denoted as a source operand; these notations are reserved for
future expansion.
Format Notation
Operation
RR
RET PC, Rs
old S := S;
old L := L;
PC := Rs(31..1)//0;
SR := Rsf(31..21)//00//Rs(0)//Rsf(17..0);
-- ILC := 0;
-- S := Rs(0);
if old S = 0 and S = 1 or
S = 0 and old L = 0 and L = 1 then
trap ⇒ Privilege Error;
difference(6..0) := FP - SP(8..2);
-- difference is signed, difference(6) = sign bit
if difference ≥ 0 then
continue at next instruction;
-- RET is finished
else
repeat
SP := SP - 4;
register SP(7..2)^ := memory SP^;
-- memory ⇒ local register
difference := difference + 1;
until difference = 0;