GMS30C2116 Datasheet, PDF (114/322 Pages) Hynix Semiconductor – USERS MANUAL

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CHAPTER 3
3.33.2 Floating-Point Instructions (continued)
A floating-point instruction, except a Floating-point Compare, can raise any of the
exceptions Invalid Operation, Division by Zero, Overflow, Underflow or Inexact. FCMP
and FCMPD can raise only the Invalid Operation exception (at unordered). FCMPU and
FCMPUD cannot raise any exception.
At an exception, the following additional action is performed:
¡ Ü Any corresponding accrued-exception flag whose corresponding trap-enable flag is zero
(not enabled) is set to one; all other accrued-exception flags remain unchanged.
¡ Ü If a corresponding trap-enable flag is one (enabled), any corresponding actual-exception
flag is set to one; all other actual-exception flags are cleared. The destination remains
unchanged.
In the present software version, the software emulation routine must branch to the
corresponding user-supplied exception trap handler. The (modified) result, the source
operand, the stack address of the destination operand and the address of the floating-
point instruction are passed to the trap handler. In the future hardware version, a trap to
Range Error will occur; the Range Error handler will then initiate re-execution of the
floating-point instruction by branching to the entry of the corresponding software
emulation routine, which will then act as described before.
The only exceptions that can coincide are Inexact with Overflow and Inexact with
Underflow. An Overflow or Underflow trap, if enabled, takes precedence over an Inexact
trap; the Inexact accrued-exception flag G2(0) must then be set as well.