GMS30C2116 Datasheet, PDF (81/322 Pages) Hynix Semiconductor – USERS MANUAL

INSTRUCTION SET
3-17
3.8 Sum Instructions
The sum of the source operand and the immediate operand is placed in the destination
register and the condition flags are set or cleared accordingly. At SUM, both operands and
the result are interpreted as either all signed or all unsigned integers. At SUMS, both
operands and the result are signed integers and a trap to Range Error occurs at overflow.
Format Notation
Operation
RRconst SUM Rd, Rs, const
Rd := Rs + const;
Z := Rd = 0;
N := Rd(31);
V := overflow;
C := carry;
-- signed or unsigned Sum
-- sign
RRconst SUMS Rd, Rs, const
Rd := Rs + const;
Z := Rd = 0;
N := Rd(31);
V := overflow;
if overflow then
trap ⇒ Range Error;
-- signed Sum with trap
-- sign
When the SR is denoted as a source operand at SUM and SUMS, C is added instead of the
SR. The notation is then:
Format Notation
Operation
RRconst SUM Rd, C, const
Rd := C + const;
-- signed or unsigned Sum C
RRconst SUMS Rd, C, const
Rd := C + const;
-- signed Sum C
The flags are treated as defined by SUM or SUMS. A trap cannot occur.
Note: The effect of a Subtract immediate instruction can be obtained by using the negated
32-bit value of the immediate operand to be subtracted (except zero). At unsigned, C = 0
indicates then a borrow (the unsigned number range is exceeded below zero).
The immediate operand is constrained to the range of const. The instruction pair MOV,
ADDI or MOV, ADDSI may be used where the full integer range is required.
Register
L0 : $FFFFFFFC
L1 : $00000004
Instruction
SUM L0, L1, $120 ; L0 = L1 + const = $124