GMS30C2116 Datasheet, PDF (307/322 Pages) Hynix Semiconductor – USERS MANUAL

Appendix A. Instruction Set Details
Store (next address mode)
A-133
STxx.N
Format:
RRdis format
15
OP-code 1001 11
eS
DD
87
43
0
ds
Rd-code
Rs-code
dis1
dis2
s = 0: Rs-code encodes G0..G15 for Rs, s = 1: Rs-code encodes L0..L15 for Rs
d = 0: Rd-code encodes G0..G15 for Rd, d = 1: Rd-code encodes L0..L15 for Rd
S : Sign bit of dis, e = 0: dis = 20S // dis1(range -4,096..4,095)
e = 1: dis = 4S // dis1 // dis2 (range -268,435,456...268,435,455)
DD: D-code, D13..D12 encode data types at memory instructions
Notation:
STxx.N Rd, Rs, dis
Description:
The Store instruction of next address mode transfers data from a register Rs or a register
pair Rs//Rsf into the addressed memory location, Rd is used as an address.
The content of the destination register Rd is used as an address into memory address space,
then Rd is incremented by the signed displacement dis regardless of any exception
occurring. At a double-word data type, Rd is incremented at the first memory cycle.
Rd must not denote the PC or the SR.
In the case of all data types except byte, bit zero of dis is treated as zero for the calculation
of Rd + dis.
Data type xx is with
BU: Byte unsigned HU: Halfword unsigned W: Word
BS: Byte singed HS: Halfword signed D: Double-word
Operation:
Rd^ := Rs; Rd := Rd + dis;
[(old Rd +4)^ := Rsf;]
Exceptions:
None.