GMS30C2116 Datasheet, PDF (161/322 Pages) Hynix Semiconductor – USERS MANUAL

BUS INTERFACE
6-39
6.11.6 I/0 Access (continued)
Symbol Description
Formula
t₄ Write data D31..D0 setup time (number of setup cycles + access cycles) x t_CLK
to end of IOWR# (or IORD#
if used as data strobe) (min.)
- 1.0 ns + ∆t_N (a) - ∆t_N (b)
Note:
(a) refers to capacitive load on signal IOWR#
(IORD#)
(b) refers to capacitive load on signals D31..D0
t₅ Write data D31..D0 hold time
(min)
(number of bus hold cycles) x t_CLK
+ 0.1 ns + ∆t_N (a) - ∆t_N (b)
Note:
(a) refers to capacitive load on signals D31..D0
(b) refers to capacitive load on signal IOWR#
(IORD#)
t₆ Read data D31..D0 setup time to 0 ns
end of IORD# (min.)
t₇ Read data D31..D0 hold time
(min.)
0 ns
Note:
Read data is sampled by the skew-compensated
IORD# signal and latched internally