GMS30C2116 Datasheet, PDF (139/322 Pages) Hynix Semiconductor – USERS MANUAL

BUS INTERFACE
6-17
6.6 Function Control Register FCR
Global register G26 is the write-only function control register FCR. The FCR controls the
polarity and function of the I/O pins IO1..IO3 and the interrupt pins INT1..INT4, the timer
interrupt mask and priority, the bus lock and the Extended Overflow exception. All bits of
the FCR are set to one on Reset. They must be initialized according to the hardware
environment and the desired function. The reserved bits must not be changed when the
FCR is updated.
Each of the four interrupt pins INT1..INT4 can cause a processor interrupt when the
corresponding interrupt mask bit is cleared. The corresponding polarity bit determines
whether the signal at the interrupt pin must be low (polarity bit = 0) or high (polarity
bit = 1) to cause an interrupt. Additionally, the internal timer interrupt can be enabled or
disabled separately.
Each of the I/O pins IO1..IO3 can be either used as input or interrupt signal (IOxDirection
= 1) or as output (IOxDirection = 0). See section 6.9.3 Bus Signal Description for details.
Bits Name
31
INT4Mask
30
INT3Mask
29
INT2Mask
28
INT1Mask
Description
1 = Interrupt INT4 Disabled
0 = Interrupt INT4 Enabled
1 = Interrupt INT3 Disabled
0 = Interrupt INT3 Enabled
1 = Interrupt INT2 Disabled
0 = Interrupt INT2 Enabled
1 = Interrupt INT1 Disabled
0 = Interrupt INT1 Enabled
27
INT4Polarity
26
INT3Polarity
25
INT2Polarity
24
INT1Polarity
1 = Non-Inverted (Interrupt on High Level)
0 = Inverted (Interrupt on Low Level)
1 = Non-Inverted (Interrupt on High Level)
0 = Inverted (Interrupt on Low Level)
1 = Non-Inverted (Interrupt on High Level)
0 = Inverted (Interrupt on Low Level)
1 = Non-Inverted (Interrupt on High Level)
0 = Inverted (Interrupt on Low Level)
23
TINTDisable
22
21..20 TimerPriority
1 = Timer Interrupt Disabled
0 = Timer Interrupt Enabled
reserved
11 = Priority 6 (higher than Priority of INT1)
10 = Priority 8 (higher than Priority of INT2)
01 = Priority 10 (higher than Priority of INT3)
00 = Priority 12 (higher than Priority of INT4)
19..18
17
BusLock
16
EOVDisable
reserved
DMA Access (see also section 6.9.3. ACT signal):
1 = Non-Locked
0 = Locked out
Extended Overflow Exception:
1 = Disabled
0 = Enabled