GMS30C2116 Datasheet, PDF (196/322 Pages) Hynix Semiconductor – USERS MANUAL

A-22
Branch on Not Overflow
Appendix A. Instruction Set Details
BNV
Format:
PCrel format
15
87 6
0
OP-code
0
low-rel
S
1111 0001
S: sign bit of rel
rel = 25 S // low-rel // 0
range -128 ~ 126
Notation:
BNV rel
Description:
If the overflow flag V is cleared (V = 0), place the branch address PC + rel (relative of the
first byte after the Branch instruction) in the program counter PC and clear the cache-mode
flag M; all condition flags remain unchanged. Then instruction execution proceeds at the
branch address placed in the PC
When the branch condition is not met, the M flag and the condition flags remain
unchanged and instruction execution proceeds sequentially.
Note: rel is signed to allow forward or backward branches.
Operation:
If V = 0 then
PC := PC + rel
M := 0
Exceptions:
None.