GMS30C2116 Datasheet, PDF (35/322 Pages) Hynix Semiconductor – USERS MANUAL

ARCHITECTURE
1-15
1.2.13 Memory Control Register MCR, G27
G27 is the write-only memory control register MCR. The MCR controls additional
parameters for the external memory, the internal memory refresh rate, the mapping of the
entry table and the processor power management. The MCR can be addressed only via the
high global flag H being set. Copying an operand to the MCR is a privileged operation.
The MCR is described in the bus interface description in section 6.
1.3 Local Register Set
The architecture provides a set of 64 local registers of 32 bits each. The local registers
0..63 represent the register part of the stack, containing the most recent stack frame(s).
31
0
0
L0
Local Register L0
L15
Local Register L15
63
Figure 1.9: Local Register Set 0..63
The local registers can be addressed by the register code (0..15) of an instruction as
L0..L15 only relative to the frame pointer FP; they can also be addressed absolutely as part
of the stack in the stack address mode (see section 3.1.1. Address Modes).
The absolute local register address is calculated from the register code as:
absolute local register address := (FP + register code) modulo 64.
That is, only the least significant six bits of the sum FP + register code are used and thus,
the absolute local register addresses for L0..L15 wrap around modulo 64. The local register
set organized as a circular buffer.
The absolute local register addresses for FP + register code + 1 or FP + FL + offset are
calculated accordingly.
The least significant six bits of Frame Pointer FP point to the beginning of the current stack
(L0).