GMS30C2116 Datasheet, PDF (8/322 Pages) Hynix Semiconductor – USERS MANUAL

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TABLE OF CONTENTS
6.2 I/O Bus Control ................................................................................................6-9
6.3 Bus Control Register BCR .............................................................................6-10
6.4 Memory Control Register MCR .....................................................................6-13
6.4.1 Output Voltage...................................................................................6-14
6.4.2 Input Threshold ..................................................................................6-14
6.4.3 Power Down.......................................................................................6-14
6.4.4 IRAM Refresh Test ............................................................................6-15
6.4.5 IRAM Refresh Rate ...........................................................................6-15
6.4.6 Entry Table Map ................................................................................6-15
6.4.7 MEMx Bus Hold Break .....................................................................6-15
6.5 Input Status Register ISR ...............................................................................6-16
6.6 Function Control Register FCR......................................................................6-17
6.7 Watchdog Compare Register WCR................................................................6-19
6.8 IO3 Control Modes.........................................................................................6-19
6.8.1 IO3Standard Mode .............................................................................6-19
6.8.2 Watchdog Mode .................................................................................6-19
6.8.3 IO3Timing Mode ...............................................................................6-20
6.8.4 IO3TimerInterrupt Mode ...................................................................6-20
6.9 Bus Signals .....................................................................................................6-21
6.9.1 Bus Signals for the GMS30C2132 Processor ....................................6-21
6.9.2 Bus Signals for the GMS30C2116 Processor ....................................6-22
6.9.3 Bus Signal Description.......................................................................6-23
6.10 DC Characteristics........................................................................................6-27
6.11 AC Characteristics........................................................................................6-29
6.11.1 Processor Clock................................................................................6-29
6.11.2 DRAM RAS Access.........................................................................6-30
6.11.3 DRAM Fast Page Mode Access.......................................................6-31
6.11.3.1 Multi-Cycle Access.........................................................6-31
6.11.3.2 Single-Cycle Access .......................................................6-32
6.11.4 DRAM CAS-Before-RAS Refresh ..................................................6-34
6.11.5 SRAM Access ..................................................................................6-35
6.11.5.1 Multi-Cycle Access.........................................................6-35
6.11.5.2 Single-Cycle Access .......................................................6-37
6.11.6 I/0 Access .........................................................................................6-38