GMS30C2116 Datasheet, PDF (180/322 Pages) Hynix Semiconductor – USERS MANUAL

A-6
Signed ADD Immediate with trap
Appendix A. Instruction Set Details
ADDSI
Format:
Rimm format
15
10 9 8 7
43
0
OP-code
dn
Rd-code
n
0110 11
imm1
imm2
d = 0: Rd-code encoded G0..G15 for Rd
d = 1: Rd-code encoded L0..L15 for Rd
n: bit 8 // bit 3..0 encode n = 0..31, see Table 2.3 Encoding of Immediate Values
Notation:
ADDSI Rd, imm
ADDSI Rd, CZ (when n = 0 )
Description:
The immediate operand (imm) is added to the destination operand (Rd), the result is placed
in the destination register (Rd) and the condition flag are set or cleared accordingly.
Both operands and the result are signed integers and a trap to Range Error occurs at
overflow.
When the immediate value n = 0, C is only added to the destination operand if Z = 0 or
Rd(0) is one (round to even).
Operation:
When Rs is not SR
Rd := Rd + imm;
Z := Rd = 0;
N := Rd(31);
V := overflow;
if overflow then
trap -> Range Error
When Rs is SR
Rd := Rd + (C and (Z=0 or Rd(0)));
Z := Rd = 0;
N := Rd(31);
V := overflow;
if overflow then
trap -> Range Error
Exceptions:
Overflow exception (trap to Range Error)