GMS30C2116 Datasheet, PDF (298/322 Pages) Hynix Semiconductor – USERS MANUAL

A-124
Set Stack Address
Appendix A. Instruction Set Details
SETADR
Format:
Rn format
15
OP-code
1011 10
7
43
0
d
n
0
Rd-code
n
0000
d = 0: Rd-code encodes G0..G15 for Rd
d = 1: Rd-code encodes L0..L15 for Rd
n: Bit 8 // bits 3..0 encode n = 0..31
Notation:
SETADR Rd
Description:
The Set Stack Address instruction calculates the stack address of the beginning of the
current stack frame. L0..L15 of this frame can then be addressed relative to this stack
address in the stack address mode with displacement values of 0..60 respectively.
The frame pointer FP is placed, expanded to the stack address, in the destination register.
The FP itself and all condition flags remain unchanged. The expanded FP address is the
address at which the content of L0 would be stored if pushed onto the memory part of the
stack.
The Set Stack Address instruction shares the basic OP-code SETxx, it is differentiated by n
= 0 and not denoting the SR or the PC.
Operation:
Rd := SP(31..9) // SR(31..25) // 00 + carry into bit 9
- SR(31..25) is FP
- carry into bit 9 := ( SP(8)=1 and SR(31)=0 )
Exceptions:
None.