GMS30C2116 Datasheet, PDF (182/322 Pages) Hynix Semiconductor – USERS MANUAL

A-8
AND with source used inverted
Appendix A. Instruction Set Details
ANDN
Format:
RR format
15
OP-code
0011 01
10 9
d
87
s
Rd-code
43
0
Rs-code
s = 0: Rs-code encoded G0..G15 for Rs
s = 1: Rs-code encoded L0..L15 for Rs
d = 0: Rd-code encoded G0..G15 for Rd
d = 1: Rd-code encoded L0..L15 for Rd
Notation:
ANDN Rd, Rs
Description:
The result of a bitwise logical AND not (ANDN) of the source operand (Rs) and the
destination operand (Rd) is placed in the destination register (Rd) and the Z flag is set or
cleared accordingly. The source operand is used inverted (itself remaining unchanged).
Operation:
Rd := Rd and not Rs;
Z := Rd = 0;
Exceptions:
None.