GMS30C2116 Datasheet, PDF (128/322 Pages) Hynix Semiconductor – USERS MANUAL

6-6
6.1.2.2 DRAM Refresh (CAS before RAS Refresh)
CLK
CHAPTER 6
Address Bus
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RAS#
CAS#
RAS precharge time
1..4 cycles
RAS to CAS delay time CAS access
1..4 cycles
time
1..4 cycles
Figure 6.6: DRAM Refresh