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GMS30C2116 Datasheet, PDF (15/322 Pages) Hynix Semiconductor – USERS MANUAL | |||
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Overview
0-5
0.1. GMS30C2116/32 RISC/DSP (continued)
¡ à Software instructions, call an associated subprogram and pass a source operand and the
address of a destination operand to it
¡ à DSP Multiply instructions:
signed and/or unsigned multiplication â single and double word product
¡ à DSP Multiply-Accumulate instructions:
signed multiply-add and multiply-subtract â single and double word product sum and
difference
¡ à DSP Half word Multiply-Accumulate instructions:
signed multiply-add operating on four half word operands â single and double word
product sum
¡ à DSP Complex Half word Multiply instruction:
signed complex half word multiplication â real and imaginary single word product
¡ à DSP Complex Half word Multiply-Accumulate instruction:
signed complex half word multiply-add â real and imaginary single word product sum
¡ à DSP Add and Subtract instructions:
signed half word add and subtract with and without fixed-point adjustment â single
word sum and difference
¡ à Floating-point instructions are architecturally fully integrated, they are executed as
Software instructions by the present version. Floating-point Add, Subtract, Multiply,
Divide, Compare and Compare unordered for single and double-precision, and Convert
single â double are provided.
Exceptions:
¡ à Pointer, Privilege, Frame and Range Error, Extended Overflow, Parity Error, Interrupt
and Trace mode exception
¡ à Watchdog function
¡ à Error-causing instructions can be identified by backtracking, thus allowing a very
detailed error analysis
Timer:
¡ à Two multifunctional timers
Bus Interface:
¡ à Separate address bus of 26 (GMS30C2132) or 22 (GMS30C2116) bits and data bus of up
to 32 (GMS30C2132) or 16 bits (GMS30C2116) provide a throughput of four or two bytes
at each clock cycle
¡ ÃData bus width of 32, 16 or 8 bits, individually selectable for each external memory area.
¡ à Up to seven vectored interrupts
¡ à Configurable I/O pins
¡ à Internal generation of all memory and I/O control signals
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