MC9S12KG128_10 Datasheet, PDF (594/606 Pages) Freescale Semiconductor, Inc – HCS12 Microcontrollers

Appendix A Electrical Characteristics
SS¹
(OUTPUT)
SCK
(CPOL = 0)
(OUTPUT)
SCK
(CPOL = 1)
(OUTPUT)
MISO
(INPUT)
1
2
4
4
5
6
MSB IN2
12
11
BIT 6 . . . 1
9
MOSI
(OUTPUT)
PORT DATA
MASTER MSB OUT2
10
BIT 6 . . . 1
11
3
12
LSB IN
MASTER LSB OUT
1. If configured as output
2. LSBF = 0. For LSBF = 1, bit order is LSB, bit 1, ..., bit 6, MSB.
Figure A-6. SPI Master Timing (CPHA =1)
Table A-22. SPI Master Mode Timing Characteristics
Conditions are shown in Table A-4 unless otherwise noted, CLOAD = 200pF on all outputs
Num C
Rating
Symbol
Min
Typ
1 P Operating Frequency
1 P SCK Period
2 D Enable Lead Time
3 D Enable Lag Time
4 D Clock (SCK) High or Low Time
5 D Data Setup Time (Inputs)
6 D Data Hold Time (Inputs)
9 D Data Valid (after SCK Edge)
10 D Data Hold Time (Outputs)
11 D Rise Time Inputs and Outputs
12 D Fall Time Inputs and Outputs
f_op
DC
—
t_sck
4
—
t_lead
1/2
—
t_lag
1/2
—
t_wsck
t_bus − 30
—
t_su
25
—
t_hi
0
—
t_v
—
—
t_ho
0
—
t_r
—
—
t_f
—
—
PORT DATA
Max
1/4
2048
—
1024 t_bus
—
—
25
—
25
25
Unit
f_bus
t_bus
t_sck
t_sck
ns
ns
ns
ns
ns
ns
ns
MC9S12KG128 Data Sheet, Rev. 1.16
594
Freescale Semiconductor