MC9S12KG128_10 Datasheet, PDF (525/606 Pages) Freescale Semiconductor, Inc – HCS12 Microcontrollers

18.3.2.5 Reserved Registers
Chapter 18 Multiplexed External Bus Interface (MEBIV3)
Module Base + 0x0004
Starting address location affected by INITRG register setting.
7
6
5
4
3
2
1
0
R
0
0
0
0
0
0
0
0
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 18-6. Reserved Register
Module Base + 0x0005
Starting address location affected by INITRG register setting.
7
6
5
4
3
2
1
0
R
0
0
0
0
0
0
0
0
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 18-7. Reserved Register
Module Base + 0x0006
Starting address location affected by INITRG register setting.
7
6
5
4
3
2
1
0
R
0
0
0
0
0
0
0
0
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 18-8. Reserved Register
Module Base + 0x0007
Starting address location affected by INITRG register setting.
7
6
5
4
3
2
1
0
R
0
0
0
0
0
0
0
0
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 18-9. Reserved Register
MC9S12KG128 Data Sheet, Rev. 1.16
Freescale Semiconductor
525