MC9S12KG128_10 Datasheet, PDF (288/606 Pages) Freescale Semiconductor, Inc – HCS12 Microcontrollers

Chapter 9 Freescale’s Scalable Controller Area Network (S12MSCANV2)
Table 9-10. CANRIER Register Field Descriptions (continued)
Field
Description
1
OVRIE
Overrun Interrupt Enable
0 No interrupt request is generated from this event.
1 An overrun event causes an error interrupt request.
0
RXFIE
Receiver Full Interrupt Enable
0 No interrupt request is generated from this event.
1 A receive buffer full (successful message reception) event causes a receiver interrupt request.
1 _{WUPIE and WUPE (see Section 9.3.2.1, “MSCAN Control Register 0 (CANCTL0)”) must both be enabled if the recovery}
mechanism from stop or wait is required.
2 _{Bus-off state is defined by the CAN standard (see Bosch CAN 2.0A/B protocol specification: for only transmitters. Because the}
only possible state change for the transmitter from bus-off to TxOK also forces the receiver to skip its current state to RxOK,
the coding of the RXSTAT[1:0] flags define an additional bus-off state for the receiver (see Section 9.3.2.5, “MSCAN Receiver
Flag Register (CANRFLG)”).
9.3.2.7 MSCAN Transmitter Flag Register (CANTFLG)
The transmit buffer empty flags each have an associated interrupt enable bit in the CANTIER register.
Module Base + 0x0006
7
6
5
4
3
2
1
R
0
0
0
0
0
TXE2
TXE1
W
Reset:
0
0
0
0
0
1
1
= Unimplemented
Figure 9-10. MSCAN Transmitter Flag Register (CANTFLG)
0
TXE0
1
NOTE
The CANTFLG register is held in the reset state when the initialization
mode is active (INITRQ = 1 and INITAK = 1). This register is writable when
not in initialization mode (INITRQ = 0 and INITAK = 0).
Read: Anytime
Write: Anytime for TXEx flags when not in initialization mode; write of 1 clears flag, write of 0 is ignored
MC9S12KG128 Data Sheet, Rev. 1.16
288
Freescale Semiconductor