MC9S12KG128_10 Datasheet, PDF (238/606 Pages) Freescale Semiconductor, Inc – HCS12 Microcontrollers

Chapter 7 Analog-to-Digital Converter (ATD10B16CV3) Block Description
7.3.2.8 Reserved Register 0 (ATDTEST0)
7
6
5
4
3
2
1
0
R
u
u
u
u
u
u
u
u
W
Reset
1
0
0
0
0
0
0
0
= Unimplemented or Reserved
u = Unaffected
Figure 7-10. Reserved Register 0 (ATDTEST0)
Read: Anytime, returns unpredictable values
Write: Anytime in special modes, unimplemented in normal modes
NOTE
Writing to this register when in special modes can alter functionality.
7.3.2.9 ATD Test Register 1 (ATDTEST1)
This register contains the SC bit used to enable special channel conversions.
7
6
5
4
3
2
1
0
R
u
u
u
u
u
u
u
SC
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
u = Unaffected
Figure 7-11. Reserved Register 1 (ATDTEST1)
Read: Anytime, returns unpredictable values for bit 7 and bit 6
Write: Anytime
NOTE
Writing to this register when in special modes can alter functionality.
Table 7-19. ATDTEST1 Field Descriptions
Field
0
SC
Description
Special Channel Conversion Bit — If this bit is set, then special channel conversion can be selected using
CC, CB, and CA of ATDCTL5. Table 7-20 lists the coding.
0 Special channel conversions disabled
1 Special channel conversions enabled
MC9S12KG128 Data Sheet, Rev. 1.16
238
Freescale Semiconductor