MC9S12KG128_10 Datasheet, PDF (123/606 Pages) Freescale Semiconductor, Inc – HCS12 Microcontrollers

Chapter 3 2 Kbyte EEPROM Module (S12EETS2KV1)
Module Base + 0x0002
7
6
5
4
3
2
1
0
R
0
0
0
0
0
0
0
0
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 3-6. RESERVED2
All bits read 0 and are not writable.
3.3.2.4 EEPROM Configuration Register (ECNFG)
The ECNFG register enables the EEPROM interrupts.
Module Base + 0x0003
7
6
5
4
3
2
1
0
R
0
0
0
0
0
0
CBEIE
CCIE
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 3-7. EEPROM Configuration Register (ECNFG)
CBEIE and CCIE bits are readable and writable while bits 5-0 read 0 and are not writable.
Table 3-4. ECNFG Field Descriptions
Field
7
CBEIE
6
CCIE
Description
Command Buffer Empty Interrupt Enable — The CBEIE bit enables the interrupts in case of an empty
command buffer in the EEPROM.
0 Command buffer empty interrupts disabled.
1 An interrupt will be requested whenever the CBEIF flag is set (see Section 3.3.2.6, “EEPROM Status Register
(ESTAT)”).
Command Complete Interrupt Enable — The CCIE bit enables the interrupts in case of all commands being
completed in the EEPROM.
0 Command complete interrupts disabled.
1 An interrupt will be requested whenever the CCIF flag is set (see Section 3.3.2.6, “EEPROM Status Register
(ESTAT)”).
3.3.2.5 EEPROM Protection Register (EPROT)
The EPROT register defines which EEPROM sectors are protected against program or erase.
MC9S12KG128 Data Sheet, Rev. 1.16
Freescale Semiconductor
123