MC9S12KG128_10 Datasheet, PDF (526/606 Pages) Freescale Semiconductor, Inc – HCS12 Microcontrollers

Chapter 18 Multiplexed External Bus Interface (MEBIV3)
These register locations are not used (reserved). All unused registers and bits in this block return logic 0s
when read. Writes to these registers have no effect.
These registers are not in the on-chip map in special peripheral mode.
18.3.2.6 Port E Data Register (PORTE)
Module Base + 0x0008
Starting address location affected by INITRG register setting.
R
W
Reset
Alternate
Pin Function
7
Bit 7
0
NOACC
6
5
4
3
2
6
5
4
3
2
0
0
0
0
0
MODB
or IPIPE1
or CLKTO
MODA
or IPIPE0
ECLK
LSTRB
or TAGLO
R/W
= Unimplemented or Reserved
u = Unaffected by reset
Figure 18-10. Port E Data Register (PORTE)
1
Bit 1
u
IRQ
0
Bit 0
u
XIRQ
Read: Anytime when register is in the map
Write: Anytime when register is in the map
Port E is associated with external bus control signals and interrupt inputs. These include mode select
(MODB/IPIPE1, MODA/IPIPE0), E clock, size (LSTRB/TAGLO), read/write (R/W), IRQ, and XIRQ.
When not used for one of these specific functions, port E pins 7:2 can be used as general-purpose I/O and
pins 1:0 can be used as general-purpose input. The port E assignment register (PEAR) selects the function
of each pin and DDRE determines whether each pin is an input or output when it is configured to be
general-purpose I/O. DDRE also determines the source of data for a read of PORTE.
Some of these pins have software selectable pull resistors. IRQ and XIRQ can only be pulled up whereas
the polarity of the PE7, PE4, PE3, and PE2 pull resistors are determined by chip integration. Please refer
to the device overview chapter (Signal Property Summary) to determine the polarity of these resistors.
A single control bit enables the pull devices for all of these pins when they are configured as inputs.
This register is not in the on-chip map in special peripheral mode or in expanded modes when the EME
bit is set. Therefore, these accesses will be echoed externally.
NOTE
It is unwise to write PORTE and DDRE as a word access. If you are
changing port E pins from being inputs to outputs, the data may have extra
transitions during the write. It is best to initialize PORTE before enabling as
outputs.
MC9S12KG128 Data Sheet, Rev. 1.16
526
Freescale Semiconductor