MC9S12KG128_10 Datasheet, PDF (239/606 Pages) Freescale Semiconductor, Inc – HCS12 Microcontrollers

Chapter 7 Analog-to-Digital Converter (ATD10B16CV3) Block Description
Table 7-20. Special Channel Select Coding
SC
CD
CC
CB
1
0
0
X
1
0
1
0
1
0
1
0
1
0
1
1
1
0
1
1
1
1
X
X
CA
Analog Input Channel
X
Reserved
0
V_RH
1
V_RL
0
(V_RH+V_RL) / 2
1
Reserved
X
Reserved
7.3.2.10 ATD Status Register 2 (ATDSTAT2)
This read-only register contains the Conversion Complete Flags CCF15 to CCF8.
R
W
Reset
7
CCF15
0
6
CCF14
5
CCF13
4
CCF12
3
CCF11
2
CCF10
0
0
0
0
0
= Unimplemented or Reserved
Figure 7-12. ATD Status Register 2 (ATDSTAT2)
Read: Anytime
Write: Anytime, no effect
Table 7-21. ATDSTAT2 Field Descriptions
1
CCF9
0
0
CCF8
0
Field
7:0
CCF[15:8]
Description
Conversion Complete Flag Bits — A conversion complete flag is set at the end of each conversion in a
conversion sequence. The flags are associated with the conversion position in a sequence (and also the result
register number). Therefore, CCF8 is set when the ninth conversion in a sequence is complete and the result
is available in result register ATDDR8; CCF9 is set when the tenth conversion in a sequence is complete and
the result is available in ATDDR9, and so forth. A flag CCFx (x = 15, 14, 13, 12, 11, 10, 9, 8) is cleared when
one of the following occurs:
• Write to ATDCTL5 (a new conversion sequence is started)
• If AFFC = 0 and read of ATDSTAT2 followed by read of result register ATDDRx
• If AFFC = 1 and read of result register ATDDRx
In case of a concurrent set and clear on CCFx: The clearing by method A) will overwrite the set. The clearing
by methods B) or C) will be overwritten by the set.
0 Conversion number x not completed
1 Conversion number x has completed, result ready in ATDDRx
MC9S12KG128 Data Sheet, Rev. 1.16
Freescale Semiconductor
239