MC9S12KG128_10 Datasheet, PDF (103/606 Pages) Freescale Semiconductor, Inc – HCS12 Microcontrollers

Chapter 2 128 Kbyte ECC Flash Module (S12FTS128K1ECCV1)
Read: Register FCLKDIV
Clock Register
Loaded
Bit FDIVLD set?
no
Check
yes
Write: Register FCLKDIV
Write: Flash address to start
1. ^{compression and number of}
word addresses to compress (max 16,384)
2.
Write: Register FCMD
Data Compress Command
0x06
NOTE: command write sequence
aborted by writing 0x00 to
FSTAT register.
3.
Write: Register FSTAT
Clear bit CBEIF 0x80
NOTE: command write sequence
aborted by writing 0x00 to
FSTAT register.
Read: Register FSTAT
Write: Register FSTAT
Clear bit ACCERR 0x10
Access
Error Check
Bit
yes
ACCERR
Set?
no
no
Bit
DFDIF
yes
Set?
Bit Polling for
Command
Completion Check
Bit
CCIF
no
Set?
yes
Double Bit
Fault Detection
Check
Bit
DFDIF
yes
Set?
no
Read: Register FDATA
Data Compress Signature
Read: Register FSTAT
Write: Register FSTAT
Clear bit DFDIF 0x08
Signature
Compared to
Known Value
Signature
no
Valid?
yes
Erase and Reprogram
Flash Region Compressed
EXIT
Figure 2-25. Example Data Compress Command Flow
MC9S12KG128 Data Sheet, Rev. 1.16
Freescale Semiconductor
103