MC9S12KG128_10 Datasheet, PDF (417/606 Pages) Freescale Semiconductor, Inc – HCS12 Microcontrollers

Chapter 13 Timer Module (TIM16B8CV1) Block Description
13.2.6 IOC2 — Input Capture and Output Compare Channel 2 Pin
This pin serves as input capture or output compare for channel 2.
13.2.7 IOC1 — Input Capture and Output Compare Channel 1 Pin
This pin serves as input capture or output compare for channel 1.
13.2.8 IOC0 — Input Capture and Output Compare Channel 0 Pin
This pin serves as input capture or output compare for channel 0.
NOTE
For the description of interrupts see Section 13.6, “Interrupts”.
13.3 Memory Map and Register Definition
This section provides a detailed description of all memory and registers.
13.3.1 Module Memory Map
The memory map for the TIM16B8CV1 module is given below in Table 13-2. The address listed for each
register is the address offset. The total address for each register is the sum of the base address for the
TIM16B8CV1 module and the address offset for each register.
MC9S12KG128 Data Sheet, Rev. 1.16
Freescale Semiconductor
417